专用微控制器, A700x系列A7002系列, 嵌入式安全, 62MHz, HVQFN-32
* High reliable EEPROM for both data storage and program execution: 80 kB * Data retention time: 25 years minimum * Endurance: 500,000 cycles minimum * Dedicated Secure_MX51 MCU Memory eXtended/enhanced 80C51 * 100 kbit/s I2C slave interface * Optional ISO/IEC 7816 contact interface * Optional ISO/IEC 14443 A Contactless Interface Unit CIU * Public Key Cryptography PKC coprocessor supporting RSA, Elgamal, DSS, Diffie-Hellman, Guillou-Quisquater, Fiat-Shamir and Elliptic Curves * RSA support for the key lengths up to 2048 bit * Elliptic Curve over GFp Cryptography with key lengths up to 320 bit * Single DES 56 bit and Triple DES with 2 or 3 Keys 112 bit or 168 bit, encryption and decryption in ECB, CBC and CBC-MAC mode * High-speed AES coprocessor 128-bit parallel processing AES engine * Low-power True Random Number Generator TRNG in hardware, AIS-31 compliant * SHA1, SHA-224 and SHA-256 * SEED algorithm * MD5 * On-Chip Key generation * CRC calculations * Data Authentication Pattern DAP for the Supplementary Security Domains * Low power and low voltage design using Semiconductors handshaking technology * Power-saving SLEEP mode * Wake-up from SLEEP mode by any I2C communication request * 40 µA typical sleep mode current with I2C pads operated in weak pull-up mode, do not obstruct the bus lines * Internally generated CPU clock typical 62 MHz * 1.62 V to 5.5 V operating voltage range