AD9548BCPZ-REEL7

四路/八路输入网络时钟发生器/同步器 Quad/Octal Input Network Clock Generator/Synchronizer

Product Details

The AD9548 provides synchronization for many systems, including synchronous optical networks SONET/SDH. The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean low jitter, valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.

The AD9548 operates over an industrial temperature range of −40°C to +85°C.

**Applications**

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Network synchronization

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Cleanup of reference clock jitter

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GPS 1 pulse per second synchronization

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SONET/SDH clocks up to OC-192, including FEC

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Stratum 2 holdover, jitter cleanup, and phase transient control

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Stratum 3E and Stratum 3 reference clocks

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Wireless base stations, controllers

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Cable infrastructure

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Data communications

### Features and Benefits

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Supports Stratum2 stability in holdover mode

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Supports reference switchover with phase build-out

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Supports hitless reference switchover

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Auto/manual holdover and reference switchover

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4 pairs of reference input pins with each pair configurable as a single differential input or as 2 independent single-ended inputs

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Input reference frequencies from 1 Hz to 750 MHz

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Reference validation and frequency monitoring 1ppm

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Programmable input reference switchover priority

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Please see data sheet for additional features.

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