ANALOG DEVICES ADN2819ACPZ-CML 芯片, 时钟与数据恢复器, 2.7GHZ, LFCSP-48
Product Details
The ADN2819 provides receiver functions of Quantization, Signal Level Detect and Clock and Data Recovery at rates of OC-3, OC-12, Gigabit Ethernet, OC-48 and all FEC rates. All SONET jitter requirements are met, including: Jitter Transfer; Jitter Generation; and Jitter Tolerance. All specifications are quoted for -40ºC to +85ºC ambient temperature unless otherwise noted.
The proprietary delay and phase-locked loop design of the ADN2819 provides unprecedented jitter performance for robust high-speed networking designs.
The device is intended for WDM system applications and can be used with either an external reference clock or an on-chip crystal oscillator. Both native rates and 15/14 rate digital wrappers rates are supported by the ADN2819, without any change of reference clock required. This device together with a PIN diode and a TIA preamplifier can implement a highly integrated, low cost, low power fiber optic receiver. The receiver front end Signal Detect circuit indicates when the input signal level has fallen below a user adjustable threshold.
### Features and Benefits
频率 2.7 GHz
电源电压DC 3.00V min
输出接口数 2
供电电流 215 mA
电路数 1
针脚数 48
耗散功率 500 mW
工作温度Max 85 ℃
工作温度Min -40 ℃
耗散功率Max 500 mW
电源电压 3V ~ 3.6V
电源电压Max 3.6 V
电源电压Min 3 V
安装方式 Surface Mount
引脚数 48
封装 LFCSP-48
高度 0.83 mm
封装 LFCSP-48
工作温度 -40℃ ~ 85℃
产品生命周期 Active
包装方式 Tray
RoHS标准 RoHS Compliant
含铅标准 Contains Lead
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/12/17
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
ADN2819ACPZ-CML ADI 亚德诺 | 当前型号 | 当前型号 |
ADN2819ACPZ-CML-RL 亚德诺 | 功能相似 | ADN2819ACPZ-CML和ADN2819ACPZ-CML-RL的区别 |
ADN2819ACP-CML-RL 亚德诺 | 功能相似 | ADN2819ACPZ-CML和ADN2819ACP-CML-RL的区别 |