155/622 Mb / s的时钟和数据恢复IC,集成限幅放大器 155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp
Product Details
The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for –40°C to +85°C ambient temperature, unless otherwise noted.
The device is intended for WDM system applications and can be used with either an external reference clock or an on-chip oscillator with external crystal. Both native rates and 15/14 rate digital wrappers are supported by the ADN2807, without any change of reference clock.
This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power, fiber optic receiver.
The receiver front end signal detect circuit indicates when the input signal level has fallen below a user adjustable threshold. The signal detect circuit has hysteresis to prevent chatter at the output.
The ADN2807 is available in a compact 7 mm × 7 mm 48-lead chip-scale package LFCSP.
Applications
### Features and Benefits
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
ADN2807ACP ADI 亚德诺 | 当前型号 | 当前型号 |
ADN2807ACPZ 亚德诺 | 功能相似 | ADN2807ACP和ADN2807ACPZ的区别 |
ADN2807ACPZ-RL 亚德诺 | 功能相似 | ADN2807ACP和ADN2807ACPZ-RL的区别 |