AD7787BRM

低功耗，双通道24位Σ- Δ型ADC Low Power, 2-Channel 24-Bit Sigma-Delta ADC

GENERAL DESCRIPTION

The AD7787 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 24-bit Σ-Δ ADC with one differential input and one single ended input that can be buffered or unbuffered.

FEATURES

Power

  Supply: 2.5 V to 5.25 V operation

   Normal mode: 75 µA max

   Power-down mode: 1 µA max

RMS noise: 1.1 µV at 9.5 Hz update rate

19.5-bit p-p resolution 22 bits effective resolution

Integral nonlinearity: 3.5 ppm typical

Simultaneous 50 Hz and 60 Hz rejection

Internal clock oscillator

Rail-to-rail input buffer

VDD monitor channel

Temperature range: −40°C to +105°C

10-lead MSOP