AD7492BRUZ

1.25 MSPS ， 16毫瓦内部REF和CLK ， 12位并行ADC 1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC

Product Details

The AD7492, AD7492-4, and AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can handle bandwidths up to 10 MHz.

The conversion process and data acquisition are controlled using standard control inputs allowing for easy interface to microprocessors or DSPs. The input signal is sampled on the falling edge of CONVST and conversion is also initiated at this point. The BUSY pin goes high at the start of conversion and goes low 880 ns AD7492/AD7492-4 or 680 ns AD7492-5 later to indicate that the conversion is complete. There are no pipeline delays associated with the part. The conversion result is accessed via standard CS and RD signals over a high speed parallel interface.

The AD7492 uses advanced design techniques to achieve very low power dissipation at high throughput rates. With 5 V supplies and 1.25 MSPS, the average current consumption AD7492-5 is typically 2.75 mA. The part also offers flexible power/throughput rate management.

It is also possible to operate the part in a full sleep mode and a partial sleep mode, where the part wakes up to do a conversion and automatically enters a sleep mode at the end of conversion. The type of sleep mode is hardware selected by the PS/FS pin.

Using these sleep modes allows very low power dissipation numbers at lower throughput rates.

The analog input range for the part is 0 V to REFIN. The 2.5 V reference is supplied internally and is available for external referencing. The conversion rate is determined by the internal clock.

**Product Highlights**

1. High Throughput with Low Power Consumption. The AD7492-5 offers 1.25 MSPS throughput with 16 mW power consumption.

2. Flexible Power/Throughput Rate Management. The conversion time is determined by an internal clock. The part also features two sleep modes, partial and full, to maximize power efficiency at lower throughput rates.

3. No Pipeline Delay. The part features a standard successive approximation ADC with accurate control of the sampling instant via a CONVST input and once-off conversion control.

4. Flexible Digital Interface. The VDRIVE feature controls the voltage levels on the I/O digital pins.

5. Fewer Peripheral Components. The AD7492 optimizes PCB space by using an internal reference and internal CLK.

### Features and Benefits

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Specified for VDD of 2.7 V to 5.25 V

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Throughput Rate of 1 MSPS—AD7492

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Throughput Rate of 1.25 MSPS—AD7492-5

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Low Power:

4 mW Typ at 1 MSPS with 3 V Supplies

11 mW Typ at 1 MSPS with 5 V Supplies

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Wide Input Bandwidth

70 dB Typ SNR at 100 kHz Input Frequency

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2.5 V Internal Reference

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On-Chip CLK Oscillator

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Flexible Power/Throughput Rate Management

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No Pipeline Delays

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High-Speed Parallel Interface

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Sleep Mode: 50 nA Typ

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24-Lead SOIC and TSSOP Packages