双通道 14 位 125MSPS 模数转换器 ADC 48-VQFN -40 to 85
The ADC324x are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converter ADC family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC324x family supports serial low-voltage differential signaling LVDS in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop PLL multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
ADC3244IRGZT TI 德州仪器 | 当前型号 | 当前型号 |
ADC3244IRGZR 德州仪器 | 完全替代 | ADC3244IRGZT和ADC3244IRGZR的区别 |
ADC3244IRGZ25 德州仪器 | 完全替代 | ADC3244IRGZT和ADC3244IRGZ25的区别 |
ADC3242IRGZT 德州仪器 | 类似代替 | ADC3244IRGZT和ADC3242IRGZT的区别 |