AD9461BSVZ

16位， 130 MSPS IF采样ADC 16-Bit, 130 MSPS IF Sampling ADC

130 MSPS guaranteed sampling rate 78.7 dBFS SNR/90 dBc SFDR with 10 MHz input 3.4 V p-p input, 130 MSPS 77.7 dBFS SNR with 170.3 MHz input 4.0 V p-p input, 130 MSPS 77.0 dBFS SNR/84 dBc SFDR with 170 MHz input 3.4 V p-p input, 130 MSPS 76.3 dBFS SNR/86 dBc SFDR with 225 MHz input 3.4 V p-p input, 125 MSPS 89 dBFS two-tone SFDR with 169 MHz and 170 MHz 130 MSPS 60 fsec rms jitter Excellent linearity DNL = ±0.6 LSB typical INL = ±5.0 LSB typical 2.0 V p-p to 4.0 V p-p differential full-scale input Buffered analog inputs LVDS outputs ANSI-644 compatible or CMOS outputs Data format select offset binary or twos complement Output clock available