模数转换器 - ADC Quad 12-bit 125 MSPS
The ADC34J2x are a high-linearity, ultra-low power, dual-channel, 12-bit, 50-MSPS to 160-MSPS, analog-to-digital converter ADC family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. A clock input divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization. The devices support JESD204B interfaces in order to reduce the number of interface lines, thus allowing for high system integration density. The JESD204B interface is a serial interface, where the data of each ADC are serialized and output over only one differential pair. An internal phase-locked loop PLL multiplies the incoming ADC sampling clock by 20 to derive the bit clock that is used to serialize the 12-bit data from each channel. The devices support subclass 1 with interface speeds up to 3.2 Gbps.
型号/品牌 | 代替类型 | 替代型号对比 |
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ADC34J24IRGZT TI 德州仪器 | 当前型号 | 当前型号 |
ADC34J24IRGZR 德州仪器 | 完全替代 | ADC34J24IRGZT和ADC34J24IRGZR的区别 |
ADC34J23IRGZT 德州仪器 | 类似代替 | ADC34J24IRGZT和ADC34J23IRGZT的区别 |
ADC34J22IRGZT 德州仪器 | 类似代替 | ADC34J24IRGZT和ADC34J22IRGZT的区别 |