LMK0482xB超低噪音,符合JESD204B时钟抖动清除器与双回路锁相环 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs
The is a high-performance Clock Conditioner with JEDEC JESD204B support. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high performance outputs for traditional clocking systems. The high performance combined with features like the ability to trade-off between power or performance, dual VCOs, dynamic digital delay, holdover and glitchless analogue delay make the LMK0482x family ideal for providing flexible high performance clocking trees.
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
频率 750 MHz
电源电压DC 3.15V min
输出接口数 14
电路数 1
针脚数 64
占空比 50 %
工作温度Max 85 ℃
工作温度Min -40 ℃
电源电压 3.15V ~ 3.45V
电源电压Max 3.45 V
电源电压Min 3.15 V
安装方式 Surface Mount
引脚数 64
封装 WQFN-64
封装 WQFN-64
工作温度 -40℃ ~ 85℃
产品生命周期 Active
包装方式 Tape & Reel TR
制造应用 军用与航空, 测试与测量, 通信与网络, 视频和目视, 成像, 国防, 无线
RoHS标准 RoHS Compliant
含铅标准 Lead Free
军工级 Yes
REACH SVHC版本 2015/06/15
ECCN代码 EAR99
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