LCMXO2-640HC-4TG100C

LATTICE SEMICONDUCTOR  LCMXO2-640HC-4TG100C  可编程逻辑芯片, PLD, 640查找表, MACHXO2, 100TQFP

The is an ultra low power instant-on non-volatile PLD with densities of 640 Look-up Tables LUTs. In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM EBR, Distributed RAM, User Flash Memory UFM, Phase Locked Loops PLLs, pre-engineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I²C controller and timer/counter. It features allow these devices to be used in low cost, high volume consumer and system applications. The MachXO2 devices are designed on a 65nm non-volatile low power process. The device architecture has several features such as programmable low swing differential I/Os and the ability to turn off I/O banks, on-chip PLLs and oscillators dynamically. These features help manage static and dynamic power consumption resulting in low static power for all members of the family.

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Flexible logic architecture

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Ultra low power devices - Programmable low swing differential I/Os

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Up to 240kB sysMEM™ embedded block RAM

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Up to 54kB distributed RAM

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Dedicated FIFO control logic

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On-chip user flash memory - 100,000 write cycles

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Pre-engineered source synchronous I/O - Dedicated gearing logic

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High performance, flexible I/O buffer - On-chip differential termination

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Flexible on-chip clocking - Eight primary clocks

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Non-volatile, infinitely reconfigurable - Instant-on, powers up in microseconds

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TransFR™ reconfiguration - In-field logic update while system operates

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Enhanced system level support - On-chip oscillator with 5.5% accuracy

ESD sensitive device, take proper precaution while handling the device.