LATTICE SEMICONDUCTOR LC4256V-75TN100C 芯片, 可编程逻辑器件 MACH4000 ISP CPLD
The is a high performance SuperFAST CPLD consist of multiple 64-I/O, 256-macrocell. Output Routing Pools ORPs connect the GLBs to the I/O Blocks IOBs, which contain multiple I/O cells. The ispMACH 4000 family is a blend of Lattice"s two most popular architectures, the ispLSI® 2000 and ispMACH 4A. Retaining the best of both families, the ispMACH 4000 architecture focuses on significant innovations to combine the highest performance with low power in a flexible CPLD family. This family combines high speed and low power with the flexibility needed for ease of design. With its robust global routing pool and output routing pool, this family delivers excellent first-time-fit, timing predictability, routing, pin-out retention and density migration. It has enhanced system integration capabilities. Also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing.
频率 322 MHz
电源电压DC 3.00V min
针脚数 100
输入/输出数 64 Input
工作温度Max 90 ℃
工作温度Min 0 ℃
电源电压 3.3 V
电源电压Max 3.6 V
电源电压Min 3 V
安装方式 Surface Mount
引脚数 100
封装 TQFP-100
长度 14 mm
宽度 14 mm
高度 1.4 mm
封装 TQFP-100
工作温度 0℃ ~ 90℃ TJ
产品生命周期 Active
包装方式 Tray
制造应用 消费电子产品, Consumer Electronics
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
ECCN代码 EAR99
香港进出口证 NLR
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
LC4256V-75TN100C Lattice Semiconductor 莱迪思 | 当前型号 | 当前型号 |
LC4256V-75T100I 莱迪思 | 完全替代 | LC4256V-75TN100C和LC4256V-75T100I的区别 |
LC4256V-75TN100E 莱迪思 | 类似代替 | LC4256V-75TN100C和LC4256V-75TN100E的区别 |
LC4256V-10TN100I 莱迪思 | 类似代替 | LC4256V-75TN100C和LC4256V-10TN100I的区别 |