专业电源管理 PMIC DDR Termination Regulator
The LP2996A linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, DDR3 and DDR3L VTT bus termination with VDDQ min of 1.35V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2996A also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.
An additional feature found on the LP2996A is an active low shutdown SD pin that provides Suspend To RAM STR functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
输出接口数 1
输出电压 1.359 V
输出电流 ≤1.5 A
供电电流 320 µA
静态电流 0.32 mA
输入电压Max 5.5 V
输入电压Min 2.2 V
输出电流Max 1.5 A
工作温度Max 125 ℃
工作温度Min 0 ℃
电源电压 2.2V ~ 5.5V
输入电压 2.2V ~ 5.5V
安装方式 Surface Mount
引脚数 8
封装 SOIC-8
封装 SOIC-8
工作温度 0℃ ~ 125℃
产品生命周期 Active
包装方式 Tape & Reel TR
RoHS标准 RoHS Compliant
含铅标准 Lead Free
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
LP2996AMRX/NOPB TI 德州仪器 | 当前型号 | 当前型号 |
LP2996AMR/NOPB 德州仪器 | 功能相似 | LP2996AMRX/NOPB和LP2996AMR/NOPB的区别 |