MC14046BDWR2G

ON SEMICONDUCTOR  MC14046BDWR2G  芯片, 锁相环, 带压控振荡器, 1.9MHZ, SOIC-16

The is a Phase Locked Loop contains two phase comparators, a voltage-controlled oscillator VCO, source follower and zener diode. The comparators have two common signal inputs, PCAin and PCBin. Input PCAin can be used directly coupled to large voltage signals or indirectly coupled with a series capacitor to small voltage signals. The self-bias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator 1 an exclusive OR gate provides a digital error signal PC1out and maintains 90 phase shift at the center frequency between PCAin and PCBin signals both at 50% duty cycle. Phase comparator 2 with leading edge sensing logic provides digital error signals, PC2out and LD and maintains a 0 phase shift between PCAin and PCBin signals duty cycle is immaterial. The linear VCO produces an output signal VCOout whose frequency is determined by the voltage of input VCOin and the capacitor and resistors connected to pins C1A, C1B, R1 and R2.

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Buffered outputs compatible with HTL and low-power TTL

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Diode protection on all inputs