MC100LVEL14DWR2G

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MC100LVEL14DWR2G概述

3.3V ECL 1 : 5时钟分配芯片 3.3V ECL 1:5 Clock Distribution Chip

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of -3.0 V to -3.8 V or 3.0 V to 3.8 V. The LVEL14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW or left open and pulled LOW by the input pulldown resistor the SEL pin will select the differential clock input. The common enable EN is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V

Features

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50 ps Output-to-Output Skew
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Synchronous Enable/Disable
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Multiplexed Clock Input
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ESD Protection: >2 KV HBM
.
The 100 Series Contains Temperature Compensation
.
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V

with VEE = 0 V

.
NECL Mode Operating Range: VCC = 0 V

with VEE = -3.0 V to -3.8 V

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Internal Input Pulldown Resistors on CLK
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Q Output will Default LOW with Inputs Open or at VEE
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Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
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Flammability Rating: UL-94 code V-0 @ 1/8",

Oxygen Index 28 to 34

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Transistor Count = 303 devices
MC100LVEL14DWR2G中文资料参数规格
技术参数

无卤素状态 Halogen Free

输出接口数 5

电路数 1

工作温度Max 85 ℃

工作温度Min -40 ℃

电源电压 3V ~ 3.8V

封装参数

安装方式 Surface Mount

引脚数 20

封装 SOIC-20

外形尺寸

长度 12.95 mm

宽度 7.6 mm

高度 2.4 mm

封装 SOIC-20

物理参数

工作温度 -40℃ ~ 85℃

其他

产品生命周期 Active

包装方式 Tape & Reel TR

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

海关信息

ECCN代码 EAR99

数据手册

MC100LVEL14DWR2G引脚图与封装图
MC100LVEL14DWR2G引脚图
MC100LVEL14DWR2G封装图
MC100LVEL14DWR2G封装焊盘图
在线购买MC100LVEL14DWR2G
型号: MC100LVEL14DWR2G
描述:3.3V ECL 1 : 5时钟分配芯片 3.3V ECL 1:5 Clock Distribution Chip
替代型号MC100LVEL14DWR2G
型号/品牌 代替类型 替代型号对比

MC100LVEL14DWR2G

ON Semiconductor 安森美

当前型号

当前型号

MC100LVEL14DWG

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完全替代

MC100LVEL14DWR2G和MC100LVEL14DWG的区别

MC100EP139DWG

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