MC100EP116FAG

4路5V ECL差分接收器

The MC10EP116/100EP116 is a 6-bit differential line receiver based on the EP16 device. The 3.0GHz bandwidth provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators. pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V via a 0.01uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VThe design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VThe 100 Series contains temperature compensation.

Features

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260 ps Typical Propagation Delay

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Maximum Frequency > 3 GHz Typical

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PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V

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NECL Mode Operating Range: VCC = 0 V with VEE =-3.0 V to -5.5 V

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Open Input Default State

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Safety Clamp on Inputs

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Q Output will default LOW with inputs open or at VEE

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VBB Output