Flip Flop D-Type Bus Interface Pos-Edge 1Element 16Pin SOP T/R
General Description
The MM74HC174 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flip flops. They possess high noise immunity, low power, and speeds comparable to low power Schottky TTL circuits. This device contains 6 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the LOW-to-HIGH transition of the CLOCK input. The CLEAR input when LOW, sets all outputs to a low state.
Each output can drive 10 low power Schottky TTL equivalent loads. The MM74HC174 is functionally as well as pin compatible to the 74LS174. All inputs are protected from damage due to static discharge by diodes to VCC and ground.
Features
■ Typical propagation delay: 16 ns
■ Wide operating voltage range: 2–6V
■ Low input current: 1 µA maximum
■ Low quiescent current: 80 µA 74HC Series
■ Output drive: 10 LSTTL loads