3.3V / 5V ECL D触发器与复位和差分时钟 3.3V / 5V ECL D Flip−Flop with Reset and Differential Clock
The MC10/100EP51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 and LVEL51 devices.The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP51 allow the device to be used as a negative edge triggered flip-flop.The differential input employs clamp circuitry to maintain stability under open input conditions. When left open, the CLK input will be pulled down to V and the CLKbar input will be biased at V
Features
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电源电压DC 5.50V max
无卤素状态 Halogen Free
输出接口数 1
电路数 1
时钟频率 3 GHz
位数 1
极性 Non-Inverting, Inverting
输入数 1
工作温度Max 85 ℃
工作温度Min -40 ℃
电源电压Max 5.5V, 5.5V
安装方式 Surface Mount
引脚数 8
封装 SOIC-8
长度 5 mm
宽度 4 mm
高度 1.5 mm
封装 SOIC-8
工作温度 -40℃ ~ 85℃ TA
产品生命周期 Active
包装方式 Tape & Reel TR
制造应用 ATE
RoHS标准 RoHS Compliant
含铅标准 Lead Free
ECCN代码 EAR99
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
MC100EP51DR2G ON Semiconductor 安森美 | 当前型号 | 当前型号 |
MC10EP51DR2G 安森美 | 完全替代 | MC100EP51DR2G和MC10EP51DR2G的区别 |
MC100LVEL31DG 安森美 | 类似代替 | MC100EP51DR2G和MC100LVEL31DG的区别 |