MC10E131FNR2G

ECL输出四位D触发器

The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock C LOW and using the Clock Enable CEbar inputs for clocking. Common clocking is achieved by holding the CEbar inputs LOW and using C to clock all four flip-flops. In this case, the CEbar inputs perform the function of controlling the common clock, to each flip-flop. Individual asynchronous resets are provided R. Asynchronous set controls S are ganged together in pairs, with the pairing chosen to reflect physical chip symmetry. Data enters the master when both C and CEbar are LOW, and transfers to the slave when either CThe 100 Series contains temperature compensation.

Features

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1100MHz Min. Toggle Frequency

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Differential Outputs

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Individual and Common Clocks

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Individual Resets asynchronous

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Paired Sets asynchronous

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PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V

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75kW Input Pulldown Resistors

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NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V

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Internal Input Pulldown Resistors

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Metastability Time Constant is 200 ps.

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Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

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ESD Protection: > 2 KV HBM, > 200 V MM

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Moisture Sensitivity Level 1

For Additional Information, see Application Note AND8003/D

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Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34

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Transistor Count = 240 devices

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Pb-Free Packages are Available