MPC8321EVRAFDCA

微处理器, 32bit, 333MHz, I2C, PCI, SPI, UART, USB, 1V电源, BGA-516

*  e300 core with dual integer units enables more efficient operations to be conducted in parallel, resulting in significant performance improvement. *  The single-RISC QUICC Engine communications block offers a future-proof solution for next-generation designs by supporting programmable protocol termination and network interface termination to meet evolving protocol standards *  DDR-1/DDR-2 memory controller - one 32-bit interface operating at up to 266 MHz supporting both DDR-1 and DDR-2 *  Peripheral interfaces such as 32-bit, 66 MHz PCI, 16-bit, 66 MHz local bus interface and USB 2.0 full/low speed *  Security engine provides acceleration for control and data plane security protocols *  High degree of software compatibility with previous-generation PowerQUICC processor-based designs for backward compatibility and easier software migration