MC100EPT23

双差分LVPECL到LVTTL翻译 Dual Differential LVPECL to LVTTL Translator

The is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL/LVDS/CML input levels and LVTTL/LVCMOS output levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for applications which require the translation of a clock and a data signal.The EPT23 is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external V reference, the EPT23 does not require both ECL standard versions. The LVPECL inputs are differential. Therefore, the MC100EPT23 can accept any standard differential LVPECL input referenced from a V

Features

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1.5ns Typical Propagation Delay

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Maximum Operating Frequency > 275MHz

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24mA LVTTL Outputs

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Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V

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Open Input Default State

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Q Output will default LOW with inputs open or at GND

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Pb-Free Packages are Available