MC74VHC373

八D型锁存器具有三态输出 Octal D-Type Latch with 3-State Output

The is an advanced high speed CMOS octal latch with 3-state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input and an output enable input. When the output enable input is high, the eight outputs are in a high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

Features

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High Speed: tPD = 5.0ns Typ at VCC = 5V

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Low Power Dissipation: ICC = 4µA Max at TA = 25 C

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High Noise Immunity: VNIH = VNIL = 28% VCC

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Power Down Protection Provided on Inputs

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Balanced Propagation Delays

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Designed for 2V to 5.5V Operating Range

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Low Noise: VOLP = 0.9V Max

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Pin and Function Compatible with Other Standard Logic Families

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Latchup Performance Exceeds 300mA

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ESD Performance: HBM > 2000V; Machine Model > 200V

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Chip Complexity: 186 FETs or 46.5 Equivalent Gates

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Pb-Free Packages are Available*