3.3 V双差分LVPECL / LVDS到LVTTL翻译 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator
Description
The is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL Positive ECL or LVDS levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which require the translation of a clock and a data signal.
The LVELT23 is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the LVELT23 does not require both ECL standard versions. The LVPECL inputs are differential. Therefore, the MC100LVELT23 can accept any standard differential LVPECL input referenced from a VCC of +3.3 V.
Features
• 2.0 ns Typical Propagation Delay
• Maximum Frequency > 180 MHz
• Differential LVPECL Inputs
• PECL Mode Operating Range:VCC = 3.0 V to 3.8 V with GND = 0 V
• 24 mA LVTTL Outputs
• Flow Through Pinouts
• Internal Pulldown and Pullup Resistors
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant