OMAP3515ECBB

Sitara 处理器：Arm Cortex-A8、3D 图形、LPDDR 515-POP-FCBGA 0 to 0

Description

OMAP3515 and OMAP3503 devices are based on the enhanced OMAP 3 architecture.

The OMAP 3 architecture is designed to provide best-in-class video, image, and graphics processing sufficient to support the following:

• Streaming video

• Video conferencing

• High-resolution still image

The device supports high-level operating systems HLOSs, such as:

• Linux®

• Windows® CE

• Android™

This OMAP device includes state-of-the-art power-management techniques required for high-performance mobile products.

The following subsystems are part of the device:

• Microprocessor unit MPU subsystem based on the ARM Cortex-A8 microprocessor

• PowerVR SGX subsystem for 3D graphics acceleration to support display OMAP3515 device only

• Camera image signal processor ISP that supports multiple formats and interfacing options connected to a wide variety of image sensors

• Display subsystem with a wide variety of features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC and PAL video out.

• Level 3 L3 and level 4 L4 interconnects that provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals

The device also offers:

• A comprehensive power- and clock-management scheme that enables high-performance, low-power operation, and ultralow-power standby features. The device also supports SmartReflex adaptative voltage control. This power-management technique for automatic control of the operating voltage of a module reduces the active power consumption.

• Memory-stacking feature using the package-on-package POP implementation CBB and CBC

packages only