PCA9617ATPZ

NXP  PCA9617ATPZ  芯片, 电平转换器, 2路输入, HWSON-8

The is a CMOS level translating Fm+ I²C-bus Repeater provides level shifting between low voltage 0.8 to 5.5V and higher voltage 2.2 to 5.5V fast-mode plus Fm+ I²C-bus or SMBus applications. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bidirectional buffering for both the data SDA and the clock SCL lines, thus enabling two buses of 540pF at 1MHz or up to 4000pF at lower speeds. Using the PCA9617A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9617A is unpowered. The 2.2 to 5.5V bus port B drivers have the static level offset, while the adjustable voltage bus port A drivers eliminate the static offset voltage. This results in a low on the port B translating into a nearly 0V low on the port A.

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Voltage level translation

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Footprint and functional replacement for PCA9517A at fast-mode speeds

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Active high repeater enable input referenced to VCCB

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Open-drain input/outputs

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Latching free operation

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Supports arbitration and clock stretching across the repeater

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Powered-OFF high-impedance I²C-bus pins

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Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA