SN65LVDT2DBVTG4

TEXAS INSTRUMENTS  SN65LVDT2DBVTG4  芯片, 低压差分信号接收器 双路

The is a single low-voltage high-speed differential Line Driver and Receiver for use with telecom infrastructure. The outputs comply with the A/EIA-644 standard and provide a minimum differential output voltage magnitude of 247mV into a 100R load at signalling rates up to 630Mbps for driver and 400Mbps for receiver. When the SN65LVDS1 device is used with an LVDS receiver such as the SN65LVDT2 in a point-to-point connection, data or clocking signals can be transmitted over printed-circuit board traces or cables at very high rates with very low electromagnetic emissions and power consumption. The low power, low EMI, high ESD tolerance and wide supply voltage range make the device.

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LVDT receiver includes line termination

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Receiver open-circuit failsafe design

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Bus-terminal ESD exceeds 9kV

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Low-voltage differential signaling with typical output voltage of 350mV into a 100R load

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Low voltage TTL LVTTL level driver input is 5V tolerant

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Driver is output high-impedance with VCC<1.5V

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Receiver output and inputs are high-impedance with VCC<1.5V

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Meets or exceeds the ANSI TIA/EIA-644 standard

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Propagation delay time - 1.7ns Typical driver and 2.5ns typical receiver

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Power dissipation at 200MHz - 25mW Typical driver and 60mW typical receiver

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Differential input voltage threshold less than 100mV

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Green product and no Sb/Br