SN74HC175N

TEXAS INSTRUMENTS  SN74HC175N  触发器, 清零, 互补输出, 差分, 正沿, D, 13 ns, 60 MHz, 5.2 mA, DIP, 16 引脚

The is a quadruple D-type Flip-flop with clear. It has a direct clear CLR\\ input. It features complementary outputs from each flip-flop. Information at the data D inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of clock. When clock is at either the high or low level, the D input has no effect at the output.

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Outputs can drive up to 10 LSTTL loads

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Contain four flip-flops with double-rail outputs

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80µA Maximum low power consumption

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13ns Typical tpd

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±4mA Output drive at 5V

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1µA Maximum low input current