STM8 16MHz 闪存:16K@x8bit RAM:2KB
The medium-density STM8AL313x/4x/6x and STM8AL3L4x/6x devices are members of the STM8AL automotive ultra-low-power 8-bit family. The medium-density STM8AL3xxx family operates from 1.8 V to 3.6 V down to 1.65 V at power down and is available in the -40 to +85°C and -40 to +125°C temperature ranges.
The medium-density STM8AL3xxx ultra-low-power family features the enhanced STM8 CPU core providing increased processing power up to 16 MIPS at 16 MHz while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.
The family includes an integrated debug module with a hardware interface SWIM which allows non-intrusive In-Application debugging and ultrafast Flash programming.
All medium-density STM8AL3xxx microcontrollers feature embedded data EEPROM and low power low-voltage single-supply program Flash memory.
They incorporate an extensive range of enhanced I/Os and peripherals.
The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.
Two different packages are proposed which include 32 and 48 pins. Depending on the device chosen, different sets of peripherals are included.
All STM8AL3xxx ultra-low-power products are based on the same architecture with the same memory mapping and a coherent pinout
**Key Features**
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AEC-Q100 qualified
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Operating conditions
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Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down
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Temperature range: - 40 °C to 85 or 125 °C
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Low power features
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Five low-power modes: Wait, low-power run 5.1 μA, low-power wait 3 μA, active-halt with full RTC 1.3 μA, halt with PDR 400 nA
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Run from Flash: 195 μA/MHz + 440 μA
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Run from RAM: 90 μA/MHz + 400 μA
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Ultra-low leakage per I/0: 50 nA
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Fast wakeup from Halt: 4.7 μs
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Advanced STM8 core
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Harvard architecture and 3-stage pipeline
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Max freq. 16 MHz, 16 CISC MIPS peak
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Up to 40 external interrupt sources
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Reset and supply management
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Low power, ultra safe BOR reset with 5 selectable thresholds
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Ultra-low power POR/PDR
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Programmable voltage detector PVD
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Clock management
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1 to 16 MHz crystal oscillator
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32 kHz crystal oscillator
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Internal 16 MHz factory-trimmed RC
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Internal 38 kHz low consumption RC
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Clock security system
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Low power RTC
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BCD calendar with alarm interrupt
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Auto-wakeup from Halt 0.95 ppm resolution w/ periodic interrupt
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LCD: up to 4x28 segments w/ step-up converter
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Memories
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Program memory: up to 32 Kbyte Flash program; data retention 20 years at 55 °C
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Data memory: up to 1 Kbyte true data EEPROM; endurance 300 kcycle
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RAM: up to 2 Kbyte
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DMA
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Four channels; supported peripherals: ADC, DAC, SPI, I2C, USART, timers
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One channel for memory-to-memory
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12-bit DAC with output buffer
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12-bit ADC up to 1 Mbps/25 channels
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Temp sensor and internal reference voltage
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Two ultra-low-power comparators
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One with fixed threshold and one rail to rail
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Wakeup capability
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Timers
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Two 16-bit timers with two channels used as IC, OC, PWM, quadrature encoder
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One 16-bit advanced control timer with three channels, supporting motor control
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One 8-bit timer with 7-bit prescaler
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Two watchdogs: one window, one independent
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Beeper timer with 1-, 2- or 4 kHz frequencies
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Communication interfaces
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Synchronous serial interface SPI
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Fast I2C 400 kHz SMBus and PMBus
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USART ISO 7816 interface, IrDA, LIN 1.3, LIN 2.0
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Up to 41 I/Os, all mappable on interrupt vectors
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Development support
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Fast on-chip programming and non intrusive debugging with SWIM
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Bootloader using USART
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96-bit unique ID