SPC560P50L3CEFAY

SPC560P50L3CEFAY 托盘

This 32-bit system-on-chip SoC automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications—specifically, electrical hydraulic power steering EHPS and electric power steering EPS—as well as airbag applications.

**Key Features**

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64 MHz, single issue, 32-bit CPU core complex e200z0h

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Compliant with Power Architecture® embedded category

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Variable Length Encoding VLE

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Memory organization

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Up to 512 KB on-chip code flash memory with ECC and erase/program controller

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Additional 64 4 × 16 KB on-chip data flash memory with ECC for EEPROM emulation

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Up to 40 KB on-chip SRAM with ECC

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Fail safe protection

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Programmable watchdog timer

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Non-maskable interrupt

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Fault collection unit

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Nexus L2+ interface

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Interrupts

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16-channel eDMA controller

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16 priority level controller

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General purpose I/Os individually programmable as input, output or special function

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2 general purpose eTimer units

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6 timers each with up/down count capabilities

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16-bit resolution, cascadable counters

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Quadrature decode with rotation direction flag

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Double buffer input capture and output compare

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Communications interfaces

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2 LINFlex channels LIN 2.1

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4 DSPI channels with automatic chip select generation

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1 FlexCAN interface 2.0B Active with 32 message objects

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1 safety port based on FlexCAN with 32 message objects and up to 7.5 Mbit/s capability; usable as second CAN when not used as safety port

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1 FlexRay™ module V2.1 with selectable dual or single channel support, 32 message objects and up to 10 Mbit/s 512 KB device only

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Two 10-bit analog-to-digital converters ADC

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2 × 11 input channels, + 4 shared channels

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Conversion time < 1 μs including sampling time at full precision

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Programmable ADC Cross Triggering Unit CTU

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4 analog watchdogs with interrupt capability

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On-chip CAN/UART bootstrap loader with Boot Assist Module BAM

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1 FlexPWM unit: 8 complementary or independent outputs with ADC synchronization signals