SN65LVDS105DG4

4端口LVDS和4端口TTL - TO- LVDS转发器 4-PORT LVDS AND 4-PORT TTL-TO-LVDS REPEATERS

DESCRIPON

The SN65LVDS104 and SN65LVDS105 are a differ ential line receiver and a LVTTL input respectively

connected to four differential line drivers that implement the electrical characteristics of low-voltage

differential signaling LVDS. LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers

low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. Note:

The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the

media, the noise coupling to the environment, and other system characteristics.

FEATURES

• Receiver and Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard

– SN65LVDS105 Receives Low-Voltage TTL LVTTL Levels

– SN65LVDS104 Receives Differential Input Levels, ±100 mV

• Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz

• Operates From a Single 3.3-V Supply

• Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-Ω Load

• Propagation Delay Time

– SN65LVDS105 – 2.2 ns Typ

– SN65LVDS104 – 3.1 ns Typ

• LVTTL Levels Are 5-V Tolerant

• Electrically Compatible With LVDS, PECL, LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT, SSTL, or HSTL Outputs With External Networks

• Driver Outputs Are High Impedance When Disabled or With VCC<1.5 V

• Bus-Pin ESD Protection Exceeds 16 kV

• SOIC and TSSOP Packaging