TEXAS INSTRUMENTS SN65LVDS94DGG SerDes, 串行/解串器, 1.904 Gbps, LVDS, LVTTL, TSSOP, 56 引脚
The is a LVDS SerDes Serializer/Deserializer Receiver contains four serial-in 7-bit parallel-out shift registers, a 7 x clock synthesizer and five low-voltage differential signalling LVDS line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN65LVDS93 and SN65LVDS95, over five balanced-pair conductors and expansion to 28 bits of single-ended LVTTL synchronous data at a lower transfer rate. When receiving, the high-speed LVDS data is received and loaded into registers at the rate seven times the LVDS input clock CLKIN. The data is then unloaded to a 28-bit wide LVTTL parallel bus at the CLKIN rate. A phase-locked loop clock synthesizer circuit generates a 7 x clock for internal clocking and an output clock for the expanded data. The SN65LVDS94 presents valid data on the rising edge of the output clock CLKOUT.
电源电压DC 3.00V min
输出接口数 28
针脚数 56
数据速率 1.90 Gbps
输入电流Min 20 μA
输入数 4
工作温度Max 85 ℃
工作温度Min -40 ℃
电源电压 3V ~ 3.6V
电源电压Max 3.6 V
电源电压Min 3 V
安装方式 Surface Mount
引脚数 56
封装 TSSOP-56
封装 TSSOP-56
工作温度 -40℃ ~ 85℃
产品生命周期 Active
包装方式 Tube
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/06/15
ECCN代码 EAR99
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
SN65LVDS94DGG TI 德州仪器 | 当前型号 | 当前型号 |
SN65LVDS94DGGR 德州仪器 | 完全替代 | SN65LVDS94DGG和SN65LVDS94DGGR的区别 |
DS90CR286MTDX/NOPB 德州仪器 | 完全替代 | SN65LVDS94DGG和DS90CR286MTDX/NOPB的区别 |
SN65LVDS94DGGG4 德州仪器 | 完全替代 | SN65LVDS94DGG和SN65LVDS94DGGG4的区别 |