8位并联负载移位寄存器 8-BIT PARALLEL-LOAD SHIFT REGISTERS
The "LV166A devices are 8-bit parallel-load shift registers, designed for 2-V to 5.5-V VCC operation.
The "LV166A parallel-in or serial-in, serial-out registers feature gated clock CLK, CLK INH inputs and an overriding clear CLR\\\\ input. The parallel-in or serial-in modes are established by the shift/load SH/LD\\\\ input. When high, SH/LD\ enables the serial SER data input and couples the eight flip-flops for serial shifting with each clock CLK pulse. When low, the parallel broadside data inputs are enabled, and synchronous loading occurs on the next clock pulse. During parallel loading, serial data flow is inhibited. Clocking is accomplished on the low-to-high-level edge of CLK through a 2-input positive-NOR gate, permitting one input to be used as a clock-enable or clock-inhibit function. Holding either CLK or CLK INH high inhibits clocking; holding either low enables the other clock input. This allows the system clock to be free running, and the register can be stopped on command with the other clock input. CLK INH should be changed to the high level only when CLK is high. CLR\ overrides all other inputs, including CLK, and resets all flip-flops to zero.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
电源电压DC 2.00V ~ 5.50V
输出接口数 1
位数 8
传送延迟时间 26.0 ns
电压波节 5.00 V, 3.30 V, 2.50 V
静态电流 20.0 µA
输出电流驱动 -1.00 mA
输入数 9
工作温度Max 85 ℃
工作温度Min -40 ℃
电源电压 2V ~ 5.5V
安装方式 Surface Mount
引脚数 16
封装 SSOP-16
封装 SSOP-16
工作温度 -40℃ ~ 85℃
产品生命周期 Active
包装方式 Tape & Reel TR
RoHS标准 RoHS Compliant
含铅标准 Lead Free
ECCN代码 EAR99
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
SN74LV166ADBR TI 德州仪器 | 当前型号 | 当前型号 |
SN74LV166ADBRG4 德州仪器 | 类似代替 | SN74LV166ADBR和SN74LV166ADBRG4的区别 |
SN74LV166ADBRE4 德州仪器 | 功能相似 | SN74LV166ADBR和SN74LV166ADBRE4的区别 |