SN74LV574ARGYRG4

八路边沿触发D型触发器 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

description/ordering information

The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V VCC operation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock CLK input, the Q outputs are set to the logic levels set up at the data D inputs.

A buffered output-enable OE input can be used to place the eight outputs in either a normal logic state high or low logic levels or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

2-V to 5.5-V VCCOperation

Max tpdof 10 ns at 5 V

Typical VOLPOutput Ground Bounce

  <0.8 V at VCC= 3.3 V, TA= 25°C

Typical VOHVOutput VOHUndershoot

  >2.3 V at VCC= 3.3 V, TA= 25°C

Support Mixed-Mode Voltage Operation on All Ports

Ioff Supports Partial-Power-Down Mode Operation

Latch-Up Performance Exceeds 250 mA Per JESD 17

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model A114-A

− 200-V Machine Model A115-A

− 1000-V Charged-Device Model C101