SN74LV165ADBRE4

并联负载8位移位寄存器 PARALLEL-LOAD 8-BIT SHIFT REGISTERS

DESCRIPON

The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation. When the devices are clocked, data is shifted toward the serial output QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load SH/LD input. The ’LV165A devices feature a clock-inhibit function and a complemented serial output, QH.

FEATURES

• 2-V to 5.5-V VCC Operation

• Max tpd of 10.5 ns at 5 V

• Support Mixed-Mode Voltage Operation on All Ports

• Ioff Supports Partial-Power-Down Mode Operation

• Latch-Up Performance Exceeds 250 mA Per JESD 17

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model A114-A

– 200-V Machine Model A115-A

– 1000-V Charged-Device Model C101