SN54HC165

并联负载 8 位移位寄存器

The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial QH output. Parallel-in access to each stage is provided by eight individual direct data A–H inputs that are enabled by a low level at the shift/load SH/LD input. The SNx4HC165 devices also feature a clock-inhibit CLK INH function and a complementary serial QH output.

Clocking is accomplished by a low-to-high transition of the clock CLK input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial SER inputs.

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Wide Operating Voltage Range of 2 V to 6 V

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Outputs Can Drive Up to 10 LSTTL Loads

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Low Power Consumption, 80-µA Maximum ICC

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Typical tpd = 13 ns

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±4-mA Output Drive at 5 V

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Low Input Current of 1 µA Maximum

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Complementary Outputs

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Direct Overriding Load Data Inputs

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Gated Clock Inputs

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Parallel-to-Serial Data Conversion

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On Products Compliant to MIL-PRF-38535,

All Parameters Are Tested Unless Otherwise

Noted. On All Other Products, Production

Processing Does Not Necessarily Include Testing

of All Parameters.