TMS320DM6441AZWT

数字媒体系统级芯片 Digital Media System-on-Chip

* Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. * High-Performance Digital Media SoC * C64x+™ DSP Clock Rate * 405-MHz Max at 1.05 V or 513-MHz Max at 1.2 V * ARM926EJ-S™ Clock Rate * 202.5-MHz Max at 1.05 V or 256-MHz Max at 1.2 V * Eight 32-Bit C64x+ Instructions/Cycle * 4752 C64x+ MIPS * Fully Software-Compatible With C64x &153; ARM9™ * Advanced Very-Long-Instruction-Word VLIW TMS320C64x+™ DSP Core * Eight Highly Independent Functional Units * Six ALUs 32-/40-Bit, Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle * Two Multipliers Support Four 16 x 16-Bit Multiplies 32-Bit Results per Clock Cycle or Eight 8 × 8-Bit Multiplies 16-Bit Results per Clock Cycle * Load-Store Architecture With Non-Aligned Support * 64 32-Bit General-Purpose Registers * Instruction Packing Reduces Code Size * All Instructions Conditional * Additional C64x+™ Enhancements * Protected Mode Operation * Exceptions Support for Error Detection and Program Redirection * Hardware Support for Modulo Loop Operation * C64x+ Instruction Set Features * Byte-Addressable 8-/16-/32-/64-Bit Data * 8-Bit Overflow Protection * Bit-Field Extract, Set, Clear * Normalization, Saturation, Bit-Counting * Compact 16-Bit Instructions * Additional Instructions to Support Complex Multiplies * C64x+ L1/L2 Memory Architecture * 32K-Byte L1P Program RAM/Cache Direct Mapped * 80K-Byte L1D Data RAM/Cache 2-Way Set-Associative * 64K-Byte L2 Unified Mapped RAM/Cache Flexible RAM/CacheAllocation * ARM926EJ-S Core * Support for 32-Bit and 16-Bit Thumb® Mode Instruction Sets * DSP Instruction Extensions and Single Cycle MAC * ARM® Jazelle® Technology * Embedded ICE-RT™ Logic for Real-Time Debug * ARM9 Memory Architecture * 16K-Byte Instruction Cache * 8K-Byte Data Cache * 16K-Byte RAM * 8K-Byte ROM * Embedded Trace Buffer™ ETB11™ With 4KB Memory for ARM9 Debug * Endianness: Little Endian for ARM and DSP * Video Imaging Co-Processor VICP * Video Processing Subsystem * Front End Provides: * CCD and CMOS Imager Interface * BT.601/BT.656 Digital YCbCr 4:2:2 8-/16-Bit Interface * Preview Engine for Real-Time Image Processing * Glueless Interface to Common Video Decoders * Histogram Module * Auto-Exposure, Auto-White Balance, and Auto-Focus Module * Resize Engine * Resize Images From 1/4× to 4× * Separate Horizontal/Vertical Control * Back End Provides: * Hardware On-Screen Display OSD * Four 54-MHz DACs for a Combination of * Composite NTSC/PAL Video * Luma/Chroma Separate Video S-video * Component YPbPr or RGB Video Progressive * Digital Output * 8-/16-bit YUV or up to 24-Bit RGB * HD Resolution