TUSB5052

具有通往 2 个串行端口的集成网桥的 5 端口集线器

This controller provides bridging between the USB and the dual-enhanced UARTs. This device contains all the necessary logic to communicate with the host computer using the USB bus. In addition to the USB host interface, the device contains a 5-port hub that can be used for USB expansion. The internal 8052 microcontroller contains 16K RAM that can be loaded from the host. All the device functions, such as the USB command decoding, UART setup, and error reporting are managed by the internal microcontroller unit MCU firmware.

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Fully compliant with USB specification as a compound full-speed device: D #30230112

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Supports 12-Mbps USB data rate full speed

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Supports USB suspend and resume operations

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One upstream port and five downstream ports full and low speed

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Can support a total of 8 input endpoints and 8 output endpoints

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Dual-enhanced UARTs

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Integrated 8052 microcontroller with

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256 × 8 RAM for internal data

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6K × 8 ROM with USB and I2C boot loader

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16K × 8 RAM for code space. Totally loadable from host or I2C port.

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2K × 8 synchronous RAM used for data buffers and EDBs

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Two 8052 GPIO ports, Port-1 and Port-3

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Master I2C controller for external device accesses.

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Supports external microcontroller interface for development ease

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Built-in four-channel DMA controller for USB/UART bulk I/O

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Operates from a 6-MHz crystal. On-chip PLL generates 48/24 MHz and 7.384615 MHz for internal baud-rate generator

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Power-down mode

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Available in 100-pin TQFP

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3.3/5-V operation

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Software/hardware flow control

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Programmable Xon/Xoff characters

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Programmable auto-RTS/DTR and auto-CTS/DSR

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Automatic RS485-bus transceiver control, with and without echo

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Software selectable baud rate from 50 to 460,800 baud

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Programmable serial-interface characteristics

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5-, 6-, 7- or 8-bit characters

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Even, odd, or no parity-bit generation and detection

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1, 1.5 or 2 stop-bit generation

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Line break generation and detection

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Internal test and loop-back capabilities

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Modem-control functions TS, RTS, DSR, DTR, RI, and DCD

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Internal diagnostics capability

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Loopback control for communications link-fault isolation

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Break, parity, overrun, framing-error simulations