UC3914

5-35V 单路热插拔 IC 商用温度范围

The family of hot swap power managers provides complete power management, hot swap and fault handling capability. Integrating this part and a few external components, allows a board to be swapped in or out upon failure or system modification without removing power to the hardware, while maintaining the integrity of the powered system. Complementary output drivers and diodes have been integrated for use with external capacitors as a charge pump to ensure sufficient gate drive to the external N-channel MOSFET transistor for low RDSon. All control and housekeeping functions are integrated and externally programmable and include the fault current level, maximum output sourcing current, maximum fault time and average power limiting of the external FET. The UC3914 features a duty ratio current limiting technique, which provides peak load capability while limiting the average power dissipation of the external pass transistor during fault conditions. The fault level is fixed at 50 mV with respect to VCC to minimize total dropout.

The fault current level is set with an external current sense resistor. The maximum allowable sourcing current is programmed by using a resistor divider from VCC to REF to set the voltage on IMAX. The maximum current level, when the output appears as a current source is VVCC – VIMAX/RSENSE.

This part is offered in both 18-pin DW wide-body SOIC and dual-in-line DIL packages.

When the output current is less than the fault level, the external output transistor remains switched on. When the output current exceeds the fault level, but is less than the maximum sourcing level programmed by IMAX, the output remains switched on, and the fault timer starts to charge CT, a timing capacitor. Once CT charges to 2.5 V, the output device is turned off and CT is slowly discharged. Once CT is discharged to 0.5 V, the device performs a retry and the output transistor is switched on again. The UC3914 offers two distinct reset modes. In one mode with LR left floating or held low, the device tries to reset itself repeatedly if a fault occurs as described above. In the second mode with LR held high, once a fault occurs, the output is latched off until either LR is toggled low, the part is shutdown then re-enabled using SD\, or the power to the part is turned off and then on again.

.

5V to 35V Operation

.

Precision Maximum Current Control

.

Precision Fault Threshold

.

Programmable Average Power Limiting

.

Programmable Overcurrent Limit

.

Shutdown Control

.

Charge Pump for Low RDSon High-Side Drive

.

Latch Reset Function Available

.

Output Drive VGS Clamping

.

Fault Output Indication

.

18 Pin DIL and SOIC Packages