SRAM Chip Async Single 5V 1M-bit 128K x 8 70ns 32Pin TSOP-I
GENERAL DESCRIPTION
The K6X1008C2D families are fabricated by SAMSUNG"s advanced CMOS process technology. The families support verious operating temperature ranges and have various package types for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current.
FEATURES
· Process Technology: Full CMOS
· Organization: 128K x 8
· Power Supply Voltage: 4.5~5.5V
· Low Data Retention Voltage: 2VMin
· Three state output and TTL Compatible
· Package Type: 32-DIP-600, 32-SOP-525,
32-SOP-525, 32-TSOP1-0820F