LPC1519JBD100

NXP  LPC1519JBD100  微控制器, 32位, ARM 皮质-M3, 72 MHz, 256 KB, 36 KB, 100 引脚, LQFP

The is a 32-bit Microcontroller based on ARM Cortex-M3 core with RISC architecture operates at a maximum frequency of 72MHz. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The device incorporates 256kB internal flash, 36kB internal RAM, 4kB EEPROM, two 12-channel 12-bit A/D converter with sample rates of up to 2Msps and 78 general-purpose I/O pins. This device also features peripherals like two SPI interfaces, three USARTs, a fast-mode plus I2C-bus interface and a CAN module.

.

ARM Cortex-M3 built-in nested vectored interrupt controller NVIC

.

System tick timer

.

Serial wire debug SWD with four breakpoints and two watch points

.

Single-cycle multiplier supported

.

Memory protection unit MPU included

.

Simple DMA engine with 18 channels and 20 programmable input triggers

.

GPIO Interrupt generation capability with boolean pattern-matching feature on eight external inputs

.

Two GPIO Grouped port interrupts

.

Switch matrix for flexible configuration of each I/O pin function

.

CRC Engine

.

Quadrature encoder interface QEI

.

24-bit 4-channel Multi-rate timer MRT

.

Repetitive interrupt timer for general purpose use

.

Windowed watchdog timer WWDT

.

12MHz Internal RC oscillator trimmed to 1 % accuracy

.

Crystal oscillator with an operating range of 1MHz to 25MHz

.

Integrated PMU power management unit

.

Reduced power modes - Sleep mode, deep-sleep mode, power-down mode and deep power-down mode

.

Wake-up from deep-sleep and power-down modes

.

Timer-controlled self wake-up from Deep power-down mode