MC10H135FNR2G

MC10H135 系列 双 J-K 主-从 双稳态触发器 - PLCC-20

The MC10H135 is a dual JK master-slave flip-flop. The device is provided with an asynchronous sets and resetR. These set and reset inputs overide the clock. A common clock is provided with separate Jbar-Kbar inputs. When the clock is static, the JK bar inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock.

Features

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Propagation delay, 1.5 ns Typical

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Power Dissipation, 280 mW mV Typical/Pkg. No Load

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ftog 250 MHz Max

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Improved Noise Margin 150 mV Over Operating Voltage and Temperature Range

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Voltage Compensated

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MECL 10K Compatible

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Pb-Free Packages are Available