SN74LS164DR

TEXAS INSTRUMENTS  SN74LS164DR  移位寄存器, LS系列, 串行至并行, 1元件, SOIC, 14 引脚, 4.75 V, 5.25 V

The is a 8-bit parallel-out serial-in Shift Register features gated serial inputs and an asynchronous clear. The gated serial inputs A and B permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.

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Gated serial inputs

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Fully buffered clock and serial inputs

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Asynchronous clear

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Green product and no Sb/Br