SPLD PALAr Family 400Gates 8 Macro Cells 41.6MHz EECMOS Technology 5V 24Pin SPDIP
GENERAL DESCRIPTION
The PALCE20V8 is an advanced PAL device built with low-power, high-speed, electrically-erasable CMOS technology. Its macrocells provide a universal device architecture. The PALCE20V8 is fully compatible with the GAL20V8 and can directly replace PAL20R8 series devices and most 24-pin combinatorial PAL devices.
DISTINCTIVE CHARACTERISTICS
■ Pin and function compatible with all GAL 20V8/As
■ Electrically erasable CMOS technology provides reconfigurable logic and full testability
■ High-speed CMOS technology
— 5-ns propagation delay for “-5” version
— 7.5-ns propagation delay for “-7” version
■ Direct plug-in replacement for a wide range of 24-pin PAL devices
■ Programmable enable/disable control
■ Outputs individually programmable as registered or combinatorial
■ Peripheral Component Interconnect PCI compliant
■ Preloadable output registers for testability
■ Automatic register reset on power-up
■ Cost-effective 24-pin plastic SKINNYDIP and 28-pin PLCC packages
■ Extensive third-party software and programmer support through FusionPLD partners
■ Fully tested for 100% programming and functional yields and high reliability
■ Programmable output polarity
■ 5-ns version utilizes a split leadframe for improved performance