3.3 -V ABT翻两番总线缓冲器,三态输出 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS
The is a quadruple Bus Buffer designed specifically for low-voltage 3.3V VCC operation, but with the capability to provide a TTL interface to a 5V system environment. It features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable OE\ input is high. Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. Use of pull-up/pull-down resistors with the bus-hold circuitry is not recommended. When VCC is between 0 and 1.5V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5V, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
电源电压DC 2.70V ~ 3.60V
输出接口数 4
通道数 4
针脚数 14
位数 4
电压波节 3.30 V, 2.70 V
静态电流 7 mA
逻辑门个数 4
输出电流驱动 -500 µA
输入数 4
工作温度Max 85 ℃
工作温度Min -40 ℃
电源电压 2.7V ~ 3.6V
电源电压Max 3.6 V
电源电压Min 2.7 V
安装方式 Surface Mount
引脚数 14
封装 SSOP-14
封装 SSOP-14
工作温度 -40℃ ~ 85℃ TA
产品生命周期 Active
包装方式 Tape & Reel TR
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/06/15
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
SN74LVTH125DBR TI 德州仪器 | 当前型号 | 当前型号 |
SN74LVTH125PW 德州仪器 | 完全替代 | SN74LVTH125DBR和SN74LVTH125PW的区别 |
SN74LVTH125NSR 德州仪器 | 完全替代 | SN74LVTH125DBR和SN74LVTH125NSR的区别 |
SN74LVT125DRG4 德州仪器 | 完全替代 | SN74LVTH125DBR和SN74LVT125DRG4的区别 |