

八路透明D类锁存器具有三态输出 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
description/ordering information
The ’AHC573 devices are octal transparent D-type latches designed for 2-V to 5.5-V VCC operation. When the latch-enable LE input is high, the Q outputs follow the data D inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable OE input can be used to place the eight outputs in either a normal logic state high or low or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OEdoes not affect the internal operations of the latches. Old data can be retained or new data can
be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Operating Range 2-V to 5.5-V VCC
3-State Outputs Directly Drive Bus Lines
Latch-Up Performance Exceeds 250 mA Per JESD 17
电源电压DC 2.00V ~ 5.50V
输出接口数 8
电路数 1
位数 8
传送延迟时间 11.0 ns
电压波节 5.00 V, 3.30 V
输出电流驱动 -1.00 mA
工作温度Max 125 ℃
工作温度Min -55 ℃
安装方式 Surface Mount
引脚数 20
封装 CFP-20
长度 13.09 mm
宽度 6.92 mm
高度 2.45 mm
封装 CFP-20
工作温度 -55℃ ~ 125℃
产品生命周期 Active
包装方式 Tube
RoHS标准 Non-Compliant
含铅标准 Contains Lead
ECCN代码 EAR99
