74系列逻辑芯片/74AHC595D
DESCRIPTION
The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL. They are specified in compliance with JEDEC standard No. 7A.
The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register has separate clocks.
Data is shifted on the positive-going transitions of the SHCPinput. The data in each register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
FEATURES
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Inputs accept voltages higher than VCC
• For AHC only: operates with CMOS input levels
• For AHCT only: operates with TTL input levels
• Specified from−40 to +85°C and from−40 to +125°C.
APPLICATIONS
• Serial-to-parallel data conversion
• Remote control holding register.