74HC4046AD

NXP  74HC4046AD  芯片, 74HC CMOS逻辑器件

The is a high-speed Si-gate CMOS Device and are pin compatible with the "4046" of the "4000B" series. They are specified in compliance with JEDEC standard no. 7A. The 74HC4046A is a phase-locked-loop circuits that comprise a linear voltage-controlled oscillator VCO and three different phase comparators PC1, PC2 and PC3 with a common signal input amplifier and a common comparator input. The signal input can be directly coupled to large voltage signals or indirectly coupled with a series capacitor to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the "4046A" forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The VCO requires one external capacitor C1 between C1A and C1B and one external resistor R1 between R1 and GND or two external resistors R1 and R2 between R1 and GND and R2 and GND.

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Low power consumption

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Excellent VCO frequency linearity

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VCO-inhibit control for ON/OFF keying and for low standby power consumption

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Minimal frequency drift

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Zero voltage offset due to op-amp buffering