74VHC138M

FAIRCHILD SEMICONDUCTOR  74VHC138M  芯片, 74VHC CMOS逻辑器件

The is a 3-to-8 Decoder/Demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 binary select inputs A0, A1 and A2 determine which one of the outputs O0\ to O7\\ will go low. When enable input E3 is held low or either E1\ or E2\ is held high, decoding function is inhibited and all outputs go high. E3, E1\ and E2\ inputs are provided to ease cascade connection and for use as an address decoder for memory systems. An input protection circuit ensures that 0 to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 to 3V systems and two supply systems such as battery back-up. This circuit prevents device destruction due to mismatched supply and input voltages.

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Low power dissipation

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High noise immunity

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Power down protection provided on all inputs

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Pin and function compatible with 74HC138