74HC4053D

NXP  74HC4053D  芯片, 74HC CMOS逻辑器件

The is a triple single-pole double-throw 3x SPDT Analog Switch suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input Sn, two independent inputs/outputs nY0 and nY1 and a common input/output nZ. A digital enable input E is common to all switches. When E is high, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

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Low ON resistance - 80R, 70R, 60R typical at VCC-VEE = 4.5V, 6.0V, 9.0V respectively

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Logic level translation to enable 5V logic to communicate with ±5V analog signals

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Typical break before make built-in

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Complies with JEDEC standard No. 7A