


74LV 3.3 V CMOS 三 2 通道 模拟 复用器 / 解复用器 - DHVQFN16
* Optimized for low-voltage applications: 1.0 V to 3.6 V * Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V * Low ON resistance: * 180 Ω typical at VCC \\- VEE = 2.0 V * 100 Ω typical at VCC \\- VEE = 3.0 V * 75 Ω typical at VCC \\- VEE = 4.5 V * Logic level translation: * To enable 3 V logic to communicate with ±3 V analog signals * Typical ‘break before make’ built in * ESD protection: * HBM JESD22-A114-C exceeds 2000 V * MM JESD22-A115-A exceeds 200 V * Multiple package options * Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃